[KLUG Hardware] EETimes has more on 64-bit PowerPC (and other MDF goodies) ...

Bryan J. Smith hardware@kalamazoolinux.org
Tue, 15 Oct 2002 18:33:27 -0400 (EDT)


Well, MicroDesign Resource's Microprocessor Design Forum is on, and the
forthcoming year's goodies are on-top.  As I broke in another PC_Support post,
IBM has finally designed a forth generation 64-bit Power4 chip that now adds
full 32-bit PowerPC compatibility, including the 160 Altivec SIMD instructions
(that Adobe and other graphics products rely on).  Here's the details:

IBM PowerPC 970

- 1.8GHz initial clock
- 900MHz, 6.4GBps System Bus
- Upto 16 node system bus, single CPU per die
  (no multi-CPU dies like other Power4 processors)
- 8-issue (AMD is 9-issue, Intel is 6-7 issue + specialized)
- 118mm^2 @ 0.13um (P4 2.x is 131mm^2 @ 0.13um)
- Copper interconnects w/Silicon-on-Insulator
  (IBM, AMD standard, Intel still not using SOI)
- 300mm^2 wafer fabrication
  (like Intel, AMD still using 200^mm)

Intel's 64-bit downplay adds anti-PPC970 to anti-Opteron

Intel seems to be "downplaying" 64-bit, after launching marketing and
Gartner-driven campaigns saying IBM's PowerPC 9970 and AMD Opteron (and 64-bit
Athlon) products will not be in demand.  Intel still doesn't see it's IA-64
Itanium chips being released until the Itanium3 "Deerfield" in another 2 years.
 Rumors continue to spread regarding Intel's AMD-compatible "Yamhill" which may
not see the light of day.

Intel pushing EMS all over again?

Intel believes its 32-bit Xeon processors with 36-bit addressing (64GB) will
continue to be the flagship product for workstations and servers for the next
few years.  Both Intel "Xeon" P3/P4 chips (as well as all 32-bit AMD Athlon
processors) support an extended mapping of 4 extra bits, for an additional 60GB,
into the limited 4GB of 32-bit addressing.  For those that have been around
awhile, if this seems similiar the old "Lotus, Intel, Microsoft Extended Memory
Services" (LIM EMS) that allowed upto an additional 15MB to be mapped into the
20-bit addressing on 286 processors with a 64KB window in that first 1MB, you're
right.  Not surprisingly, that too also used 4 extra bits to allow upto 16x
memory to be addressses -- but not very efficiently either.

NEC continues to push MIPS forward, ARM 11 breaks 400MHz

For those that follow the embedded world, MIPS licensee NEC is introducing a new
64-bit "system-on-a-die" product.  Much of the world runs MIPS, from handhelds
to networking devices, and it seems Intel's (formerly Digital's)
StrongARM/XScale chips are finding there is only so much of the embedded world
they can capture from MIPS -- clearly the "x86" of the embedded world, ironically.

ARM is set to release its ARM 11 processor, breaking 400MHz and bringing new
levels of performance to the popular, low-power, small die market of 32-bit
computing.  [ The creator of the ARM, Steve Furber, sits on the board of my
former employer, Theseus Logic.  He is an interesting gentleman to meet. ]

EETimes:  "Processors begin 64-bit push"  
  http://www.eet.com/semi/news/OEG20021014S0059  

-- 
Bryan J. Smith, E.I.            Contact Info:  http://thebs.org
A+/i-Net+/Linux+/Network+/Server+ CCNA CIWA CNA SCSA/SCWSE/SCNA
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